The present invention relates to an annunciatory signal generating method and a device for generating the annunciatory signal, and more practically to an annunciatory signal generating method and a device for generating the annunciatory signal capable of avoiding the annunciatory signal from being superimposed by a grating noise thereon.
FIG. 1 shows a motherboard (PC/AT compatible motherboard) 200 and a soundboard 300 connected thereto composing a personal computer. The motherboard 200 is connected to the soundboard 300 by a connecting cable 200 through an expansion slot 202 of the motherboard 200 and a slot 302 of the soundboard 300.
The motherboard 200 provides a buzzer circuit 204 and the soundboard 300 provides a sound circuit 304 therein. Both of the buzzer circuit 204 and the sound circuit 304 are composed to produce a buzzer signal or other kinds of acoustical signals (musical sounds, PCM reproduced sound) under controls of a CPU 206 accommodated on the motherboard 200. The soundboard 300 is connected to the motherboard 200 through the expansion slot 202 in order to produce the above-mentioned other acoustical signals under controls of the CPU 206. Incidentally, the buzzer signal is composed to be supplied from the motherboard 200 to the soundboard 300 and to turn to be a sound output through a common output system sharing the use with other acoustical signals in the soundboard 300.
The buzzer circuit 204 comprises a counter/timer register 212 in which a data (a dividing ratio data) specified by a buzzer frequency is set by order from the CPU 206 through buses 208 and 210, a oscillator 214, a counter/timer circuit 216 for outputting a buzzer rectangular wave signal of a desirable buzzer frequency obtained by dividing an oscillation frequency of the oscillator 214 as much as the value determined by the dividing ratio data set in the counter/timer register 212, a port B register 218 in which an output enabling data or an output disabling data of the buzzer signal are set by order from the CPU 206 through the buses 208 and 210, an AND circuit 220 connected to outputs of the counter/timer circuit 216 and the port B register 218 and an amplification circuit 222 in which an output thereof is connected to a buzzer output terminal 224 of the motherboard 200. Incidentally, 226 indicates a circuit for a PC/AT compatible, which is formed on a LSI 228 for PC/AT compatible together with the counter/timer register 212, the counter/timer circuit 216, the port B register 218 and the AND circuit 220. Further, the LSI 228 for PC/AT compatible is accommodated on the PC/AT compatible motherboard 200 together with the CPU 206 and the oscillator 214.
The buzzer output terminal 224 of the motherboard 200 is connected to a buzzer input terminal 304 of the soundboard 300.
A sound circuit 304 of the soundboard 300 comprises; an electronic volume 306 connected to the buzzer input terminal 304, a sound control register 30 in which a first data for specifying a kind, scale and volume of the musical sound or a second data for specifying a PCM sound is set by order from the CPU 206 through the bus 208, the connecting cable 250 and a bus 307, a musical sound producing circuit 310 and an electronic volume 312 controlled by the first data set in the sound control register 308, a PCM reproducing circuit 314 and an electronic volume 316 controlled by the second data set in the sound control register 308, a mixer 318 connected to outputs of the volumes 306, 312 and 316 and an oscillation circuit 322 connected to an output of the mixer 318. An output of the oscillation circuit 322 is connected to the sound output terminal 324. Incidentally, the electronic volume 306, the sound control register 308, the musical sound producing circuit 310, the electronic volume 312, the PCM reproducing circuit 314, the electronic volume 316 and the mixer 318 are formed on a sound LSI 324.
And when the dividing ratio data is set in the counter/timer register 212 by order from the CPU 206, the buzzer rectangular wave signal of the frequency obtained by dividing an oscillation signal (FIG. 2 (1)) of the oscillator 214 as much as the value determined by the dividing ratio data is output from the counter/timer circuit 216 and supplied to an input on one side the AND circuit 220 in the buzzer circuit 204.
And when an output enabling data (FIG. 2 (2)) of the buzzer signal is set in the port B register 218 by order from the CPU 206 through the buses 208 and 210, a binary signal xe2x80x9c1xe2x80x9d (a high level signal) is output from the port B register 218 and supplied to an input on another side of the AND circuit 220.
Then the buzzer signal is supplied from the AND circuit 220 to the amplification circuit 222 and output from the buzzer output terminal 224. After transferred to the electronic volume control 306 of the soundboard 300 through a connecting line 252, the above-mentioned buzzer signal is further transferred through the mixer 318 and the amplification circuit 320, and finally output as a buzzer signal from the sound output terminal 322.
When the output disabling data is written in the port B register 218, the buzzer signal is not output.
And when a data for specifying a desirable kind, scale and volume of a musical sound is set in the sound control register 308 by order from the CPU 206, a signal of the musical sound responsive to the above-mentioned data is transferred through the musical sound producing circuit 310, the electronic volume 312, the mixer and the amplification circuit 320 and output as a signal of the musical sound from the sound output terminal 324. And when a data for specifying a signal of desirable PCM waveform to be reproduced is set in the sound control register 308 by order from the CPU 206, a signal of the PCM waveform responsive to the above-mentioned data is transferred through the PCM reproducing circuit 314, the electronic volume 316, the mixer 318 and the oscillation circuit 320 and output as a signal of the desirable PCM waveform to be reproduced from the sound output terminal 324.
Incidentally, the above-mentioned buzzer circuit 204 has a system in which output of the buzzer signal is controlled by binary signals output from the port B register 218 and accordingly the buzzer signal causes a rapid transition at the beginning and the end.
Therefore, when a buzzer signal output from the sound circuit 304 is supplied to a buzzer, an amplitude of a beeping sound emitted from the buzzer indicates 0 or a certain amplitude value as shown in FIG. 2 (3). Accordingly, this causes trouble in that grating sounds are suddenly emitted from the buzzer at the beginning and the end of the buzzer sound.
Further, in order to output a buzzer signal produced in the motherboard 200 as a sound signal through the common output system of the sound signal of the soundboard 300, the soundboard 300 needs to be connected to the motherboard 200 by the connecting cable 252 and requires a troublesome work for installing in a personal computer.
It is therefore an object of the present invention to provide an annunciatory signal generating method and a device for generating the annunciatory signal without having a grating noise, in view of the above-mentioned circumstances.
Other objects of the present invention will become clear as the description proceeds.
In order to solve the above-mentioned problem, the invention according to a first aspect of the invention relates to an annunciatory signal generating method for generating an annunciatory signal based on a signal used for generating the annunciatory signal, a first signal for indicating a start of the annunciatory signal and a second signal for indicating a stop of the above-mentioned annunciatory signal, in which a variable gain control signal which boots up gently and makes a transition at a predetermined level of fluctuation based on the above-mentioned first signal and boots down gently based on the above-mentioned second signal and sequentially the above-mentioned annunciatory signal is generated by controlling the amplitude of the above-mentioned signal for generating the annunciatory signal under the above-mentioned variable gain control signal.
The invention also relates to the annunciatory signal generating methods, as described above, in which the above-mentioned second signal is generated from the above-mentioned first signal.
The invention further relates to the annunciatory signal generating methods, as described above, in which the above-mentioned first and second signals are xe2x80x9c1xe2x80x9d and xe2x80x9c2xe2x80x9d of a binary signal respectively.
The invention as described above further relates to annunciatory signal generating methods, in which the above-mentioned first and second signals are obtained by decoding a data for indicating the types of the annunciatory signal.
According to a second aspect of the invention, there is provided first means for outputting a signal used for generating the annunciatory signal and second means for outputting a first signal for indicating a start of the annunciatory signal and a second signal for indicating a stop of the annunciatory signal. The invention according to this aspect relates to an annunciatory signal generating device for generating the annunciatory signal based on a signal used for generating the annunciatory signal output from the above-mentioned first means and also based on the above-mentioned first signal and the above-mentioned second signal output from the above-mentioned second means. Further, in the invention according to this aspect, there is provided means for generating a variable gain control signal which is connected to the above-mentioned second means, by which a variable gain control signal boots up gently and makes a transition at a predetermined level of fluctuation based on the above-mentioned first signal output from the above-mentioned second means and boots down gently based on the above-mentioned second signal output from the above-mentioned second means and means for controlling variable gain which is connected to the above-mentioned first means and to the above-mentioned means for generating variable gain control signal and outputs the above-mentioned annunciatory signal by controlling the amplitude of the signal used for generating the above-mentioned annunciatory signal output from the above-mentioned first means by the above-mentioned variable gain control signal generated from the above-mentioned means for generating variable gain control signal are provided.
The invention as described above also relates to the annunciatory signal generating device in which the above-mentioned second means is to generate the above-mentioned second signal from the above-mentioned first signal.
The invention according to the second aspect also relates to the annunciatory signal generating device, in which the above-mentioned first means comprises an oscillator, means for outputting dividing ratio signal for outputting a dividing ratio signal and a dividing circuit for dividing a frequency of an oscillation signal output from the above-mentioned oscillator as much as the dividing ratio of the dividing ratio signal output from the above-mentioned means for outputting dividing ratio signal.
The invention further relates to the annunciatory signal generating device in which the above-mentioned second means outputs the above-mentioned first signal as xe2x80x9c1xe2x80x9d and the above-mentioned second signal as xe2x80x9c0xe2x80x9d of the binary signal respectively and the above-mentioned means for generating variable gain control signal is composed of the transfer function capable of outputting a signal portion which is responsive to xe2x80x9c1xe2x80x9d of the above-mentioned binary signal, boots up gently and makes a transition at a predetermined level of fluctuation in the above-mentioned variable gain control signal and at the same time, capable of outputting a signal portion which is responsive to xe2x80x9c0xe2x80x9d of the above-mentioned binary signal and boots down gently in the above-mentioned variable gain control signal.
Further according to the second aspect of the invention, there is provided annunciatory signal generating device in which the above-mentioned second means outputs the above-mentioned first signal as xe2x80x9c1xe2x80x9d and the above-mentioned second signal as xe2x80x9c0xe2x80x9d of the binary signal respectively. And the above-mentioned means for generating variable gain control signal of the above-mentioned invention comprises; decoding means for outputting a start-reading address in response to xe2x80x9c1xe2x80x9d of the above-mentioned binary signal and a stop-reading address in response to xe2x80x9c0xe2x80x9d of the binary signal, means for outputting addresses for outputting the above-mentioned start-reading address, updating an address from the above-mentioned start-reading address and determining whether the updated address reached to the above-mentioned stop-reading address or not and memories for storing variable gain control data capable of providing the similar effects as the above-mentioned variable gain control signal. Further, the above-mentioned means for generating variable gain control signal reads the above-mentioned memory by the address from a start-reading address to a stop-reading address output from the above-mentioned means for outputting address and supplies the variable gain control data to the above-mentioned means for controlling variable gain by each address.
Further, the annunciatory signal generating device according to the second aspect of the invention, the above-mentioned second means outputs the above-mentioned first signal and the above-mentioned second signal as a signal for indicating the type of the above-mentioned annunciatory signal. And the above-mentioned means for generating variable gain control signal of the above-mentioned invention comprises; decoding means for decoding the signal indicating the type of the above-mentioned annunciatory signal and outputting the start-reading address and the stop-reading address, means for outputting addresses for outputting the above-mentioned start-reading address, updating an address from the above-mentioned start-reading address and determining whether the updated address reached to the above-mentioned stop-reading address or not and memories for storing variable gain control data capable of providing the similar effects as the above-mentioned variable gain control signal in response to the start-reading address and the stop-reading address output from the above-mentioned decoding means. Further, the above-mentioned means for generating variable gain control signal in the above-mentioned memory by the address from a start-reading address to a stop-reading address output from the above-mentioned means for outputting address and supplies the variable gain control data to the above-mentioned means for controlling variable gain by each address.
The invention according to the second aspect also relates to an annunciatory signal generating device, in which the above-mentioned means for generating variable gain control signal is composed to operate at predetermined intervals after operating on receiving a signal from the above-mentioned second means.
The invention according to the second aspect further relates to an annunciatory signal generating device in which the above-mentioned second means is a central processing unit accommodated in a motherboard and the above-mentioned means for generating variable gain control signal is accommodated in a soundboard connected to the above-mentioned motherboard.
The invention according to the second aspect further relates to an annunciatory signal generating device in which the above-mentioned means for generating variable gain control signal accommodated in the above-mentioned soundboard has a composition capable of maintaining the compatibility of application programs in the central processing unit accommodated in the above-mentioned motherboard.